In some cases, flash memory is mounted as read only memory (ROM) on a microcomputer for controlling an automobile internal combustion engine. Programs are stored in the ROM. As the program scale increases accompanied with higher control accuracy, the ROM capacity becomes as large as several megabytes. High-capacity ROM causes a memory access speed to be slower than a processing speed of the CPU. When a memory-access may require several CPU clock cycles. A buffer (or called a ROM cache) is provided for ROM access acceleration. When the ROM cache is hit, one CPU clock cycle is needed. When the ROM cache is missed, the ROM is accessed, requiring several cycles.
An access to the ROM copies one line of memory data (e.g., 256 bits) to the ROM cache. When ROM cache contains no data, the CPU waits for a time interval equivalent to the ROM access. When the CPU uses ROM data, it is desirable to keep data in the ROM cache. As described in Patent Document 1, it is a general practice to provide the ROM cache with a look-ahead feature.
An automobile internal combustion engine control program references a data map based on multiple pieces of sensor information to acquire control values. As described in Patent Document 2, the data map includes a two-dimensional N×Marray. The data map is stored in the ROM of an automobile internal combustion engine control microcomputer. The ROM access needs to be accelerated in consideration for the data map structure.    Patent Document 1: Japanese Unexamined Patent Publication No. 2004-334773    Patent Document 2: Japanese Unexamined Patent Publication No. 2005-201181